Reliable MLC NAND Flash Memoris Based on Nonlinear t-Error-Correcting Codes

Multi-level cell (MLC) NAND flash memories are very popular storage media because of their power efficiency and big storage capacity. This paper proposes to use nonlinear t-error-correcting codes to replace linear BCH codes for error detection and correction in MLC NAND flash memories. Compared to linear BCH codes with the same bit-error correcting capability t, the proposed codes have the advantage that they have less miscorrected errors and nearly no undetectable errors. The selected (8261, 8201, 11) 5-error-correcting code has no miscorrected errors of multiplicity six while the widely used (8262, 8192, 11) linear shortened BCH code has ( 11 6 ) ×A11 of them, whereA11 is the number of codewords of Hamming weight eleven in the shortened BCH code. Moreover, in spite of the fact that the Hamming distance of the proposed code is 11, it can also correct some errors of multiplicity 6 and 7 requiring no extra hardware overhead and latency penalty. In this paper, the constructions and the error correction algorithm for the nonlinear t-error-correcting codes are presented. The architecture of the encoder and the decoder for the codes are shown. The error correcting capabilities, the hardware overhead, the latency and the power consumption for the encoder and the decoder will be analyzed and compared to that of the linear BCH codes to demonstrate the advantages of the proposed codes for error detection and correction in MLC NAND flash memories.